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Submitters: Willem Wakker, Randy Marques (The Netherlands)
Submission Date: 2005-03-04
Source: WG 14
Reference Document: Version: 1.0
Date: 2004-03-04
Subject: the specification for rounding modes in 5.2.4.2.2 is needlessly imprecise.
Summary
Clause 5.2.4.2.2p6 only prescribes the rounding modes for floating-point addition. The consequence is that for the other 'normal' operations nothing is prescribed in the body of the standard. As a result the body of the standard deals with the nowadays very few implementations that have no 'proper' floating-point operations, while the requirements for even the 'mainstream' processors are non-existent or 'hidden' in an annex.
Details
It should be specified that an implementation (independent of whether this implementation conforms to the IEEE Annex F) shall implement the roundingmodes for all normal floating-point operations according to the FLT_ROUNDS values defined in 5.2.4.2.2p6, or, if an implementation cannot conform to this, at least the deviation should be documented.
Furthermore, 5.2.4.2.2p6 should have a note indicating that there might be other implementation-defined rounding behavior for other floating-point operations.
Suggested Technical Corrigendum
Change 5.2.4.2.2p6 to read:
The rounding mode for the floating-point operations addition, subtraction, multiplication and division is characterised by the implementation-defined value for FLT_ROUNDS:18)
-1
0
1
2
3
All other values for FLT_ROUNDS characterize implementation-defined rounding behavior. An implementation is allowed to deviate from this requirement for operations other than the floating-point addition in an implementation defined manner.
Add the following text as footnote to 5.2.4.2.2p6:
Apart from the rounding modes mentioned here, other non-specified rounding modes may be in effect for various other operations not specified here (e.g., the rounding modes mentioned in 6.3.1.5).
Committee Discussion